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Commit 4f994e4a authored by Milo Craun's avatar Milo Craun
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Added cpu config

parent 40eb00c1
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......@@ -56,3 +56,9 @@ We need to decide what level of optimization we want to do with gcc.
For example, with O1, the img\_gray.c will *not* vectorize the grayscale
conversion, but with O2, it will.
One thought is that if we compare the speedup between vectorized and non-vectorized, that wil give us an idea of the impact of the vector instructions?
## Basic CPU Configuration
I copied the given class configuration for the CPU microachitectural details.
It uses an Intel Skylake style cache hierarchy.
We should think about if the actual details matter.
......@@ -2,7 +2,7 @@
import m5
from m5.objects import *
m5.util.addToPath("../../gem5/configs/")
m5.util.addToPath("../gem5/configs/")
from caches import *
......@@ -39,7 +39,7 @@ system.cpu.dcache.connectBus(system.l2bus)
# Create L2 cache
system.l2cache = L2Cache()
system.l2cache.connectBPUSideBus(system.l2bus)
system.l2cache.connectCPUSideBus(system.l2bus)
# Create L3 bus
system.l3bus = L3XBar()
......@@ -70,11 +70,11 @@ system.mem_ctrl.port = system.membus.mem_side_ports
thispath = os.path.dirname(os.path.realpath(__file__))
binary = os.path.join(
thispath,
"./matmul.novector",
#"./matmul.novector",
#"./matmul86",
#"./nq86",
#"./lts86",
#"./Bubblesort-arm",
"./Bubblesort-arm",
)
system.workload = SEWorkload.init_compatible(binary)
......
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